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位置:CD54HC191F3A.A > CD54HC191F3A.A詳情

CD54HC191F3A.A中文資料

廠家型號

CD54HC191F3A.A

文件大小

1004.14Kbytes

頁面數量

34

功能描述

SYNCHRONOUS UP/DOWN COUNTERS WITH DOWN/UP MODE CONTROL

數據手冊

下載地址一下載地址二到原廠下載

生產廠商

TI2

CD54HC191F3A.A數據手冊規(guī)格書PDF詳情

2-V to 6-V VCC Operation (’HC190, 191)

4.5-V to 5.5-V VCC Operation (’HCT191)

Wide Operating Temperature Range of

?55°C to 125°C

Synchronous Counting and Asynchronous

Loading

Two Outputs for n-Bit Cascading

Look-Ahead Carry for High-Speed Counting

Balanced Propagation Delays and

Transition Times

Standard Outputs Drive Up To 15 LS-TTL

Loads

Significant Power Reduction Compared to

LS-TTL Logic ICs

description/ordering information

The CD54/74HC190 are asynchronously presettable BCD decade counters, whereas the CD54/74HC191 and

CD54/74HCT191 are asynchronously presettable binary counters.

Presetting the counter to the number on preset data inputs (A?D) is accomplished by a low asynchronous

parallel load (LOAD) input. Counting occurs when LOAD is high, count enable (CTEN) is low, and the down/up

(D/U) input is either high for down counting or low for up counting. The counter is decremented or incremented

synchronously with the low-to-high transition of the clock.

更新時間:2025-9-20 15:01:00
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