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74ALVCH16841DGGRG4.B中文資料
74ALVCH16841DGGRG4.B數(shù)據(jù)手冊(cè)規(guī)格書PDF詳情
FEATURES
· Member of the Texas Instruments Widebus?
Family
· EPIC? (Enhanced-Performance Implanted
CMOS) Submicron Process
· ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
· Latch-Up Performance Exceeds 250 mA Per
JESD 17
· Bus Hold on Data Inputs Eliminates the Need
for External Pullup/Pulldown Resistors
· Package Options Include Plastic 300-mil
Shrink Small-Outline (DL) and Thin Shrink
Small-Outline (DGG) Packages
DESCRIPTION
This 20-bit bus-interface D-type latch is designed for
1.65-V to 3.6-V VCC operation.
The SN74ALVCH16841 features 3-state outputs
designed specifically for driving highly capacitive or
relatively low-impedance loads. This device is
particularly suitable for implementing buffer registers,
unidirectional bus drivers, and working registers.
The SN74ALVCH16841 can be used as two 10-bit
latches or one 20-bit latch. The 20 latches are
transparent D-type latches. The device has
noninverting data (D) inputs and provides true data at
its outputs. While the latch-enable (1LE or 2LE) input
is high, the Q outputs of the corresponding 10-bit
latch follow the D inputs. When LE is taken low, the Q
outputs are latched at the levels set up at the D
inputs.
A buffered output-enable (1OE or 2OE) input can be used to place the outputs of the corresponding 10-bit latch
in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state,
the outputs neither load nor drive the bus lines significantly.
OE does not affect the internal operation of the latches. Old data can be retained or new data can be entered
while the outputs are in the high-impedance state.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
The SN74ALVCH16841 is characterized for operation from -40°C to 85°C.
供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫(kù)存 | 備注 | 價(jià)格 |
---|---|---|---|---|---|---|---|
MICROCHIP/微芯 |
23+ |
SOT23-5 |
69820 |
終端可以免費(fèi)供樣,支持BOM配單! |
|||
Nexperia USA Inc. |
24+ |
56-TSSOP |
56200 |
一級(jí)代理/放心采購(gòu) |
|||
NEXPERIA/安世 |
2447 |
SOT364 |
100500 |
一級(jí)代理專營(yíng)品牌!原裝正品,優(yōu)勢(shì)現(xiàn)貨,長(zhǎng)期排單到貨 |
|||
NEXPERIA |
20+ |
SSOP-56 |
4854 |
就找我吧!--邀您體驗(yàn)愉快問(wèn)購(gòu)元件! |
|||
Nexperia(安世) |
2021+ |
TSSOP-56 |
499 |
||||
恩XP |
2021+ |
DHVQFN-20 |
7600 |
原裝現(xiàn)貨,歡迎詢價(jià) |
|||
恩XP |
24+ |
DHVQFN-20 |
30000 |
原裝正品公司現(xiàn)貨,假一賠十! |
|||
恩XP |
21+ |
DHVQFN-20 |
8080 |
只做原裝,質(zhì)量保證 |
|||
恩XP |
25+ |
DHVQFN-20 |
8880 |
原裝認(rèn)準(zhǔn)芯澤盛世! |
|||
恩XP |
23+ |
DHVQFN-20 |
8080 |
原裝正品,支持實(shí)單 |
74ALVCH16841DGGRG4.B 資料下載更多...
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