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DESCRIPTION

The LVQ573 is a low voltage CMOS OCTAL D-TYPE LATCH with 3 STATE OUTPUT NON INVERTING fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low power and low noise 3.3V applications.

It has better speed performance at 3.3V than 5V LSTTL family combined with the true CMOS low power consumption.

All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.

■ HIGH SPEED: tPD = 5 ns (TYP.) at VCC = 3.3V

■ COMPATIBLEWITH TTL OUTPUTS

■ LOW POWER DISSIPATION:

ICC =4 μA (MAX.) at TA = 25 °C

■ LOW NOISE:

VOLP = 0.5 V (TYP.) at VCC = 3.3V

■ 75? TRANSMISSIONLINE DRIVING CAPABILITY

■ SYMMETRICAL OUTPUT IMPEDANCE:

|IOH| = IOL = 24 mA (MIN)

■ PCI BUS LEVELSGUARANTEED AT 24mA

■ BALANCEDPROPAGATIONDELAYS: tPLH ? tPHL

■ OPERATING VOLTAGERANGE:

VCC (OPR)= 2V to 3.6V (1.2VData Retention)

■ PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 573

■ IMPROVED LATCH-UP IMMUNITY