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? Three Analog Comparators (ACMP)

? Nineteen Combination Function Macrocells

? Three Selectable DFF/LATCH or 2-bit LUTs

? One Selectable Continuous DFF/LATCH or 3-bit

LUT

? Four Selectable DFF/LATCH or 3-bit LUTs

? One Selectable Pipe Delay or 3-bit LUT

? One Selectable Programmable Function

Generator or 2-bit LUT

? Five 8-bit Delays/Counters or 3-bit LUTs

? Two 16-bit Delays/Counters or 4-bit LUTs

? Two Deglitch Filters with Edge Detectors

? Asynchronous State Machine

? Eight States

? Flexible Input Logic from State Transitions

? Serial Communications

? I2C Protocol Compliant

? Pipe Delay – 16 Stage/3 Output (Part of

Combination Function Macrocell)

? Programmable Delay

? Additional Logic Function