国产精品久久久久无码av色戒,大帝av在线一区二区三区,国产肥熟女视频一区二区三区,大陆少妇xxxx做受,被黑人猛躁10次高潮视频

Features

◆ High performance 64-bit microprocessor, based on the

RISCore4000

– Minimized branch and load delays, through streamlined

5-stage scalar pipeline.

– Single and double precision floating-point unit

– 125 peak MFLOP/s at 250 MHz

– 330 Dhrystone MIPS at 250 MHz

– Flexible RC4700-compatible MMU

– Joint TLB on-chip, for virtual-to-physical address mapping

◆ On-chip two-way set associative caches

– 16KB instruction cache (I-cache)

– 16KB data cache (D-cache)

◆ Optional I-cache and D-cache locking (per set), provides

improved real-time support

◆ Enhanced, flexible bus interface allows simple, low-cost

design

– 64-bit Bus Interface option, 1000MB/s bandwidth support

– 32-bit Bus Interface option, 500MB/s bandwidth support

– SDRAM timing protocol, through delayed data in write cycles

– RC4000/RC5000 family bus-protocol compatibility

– Bus runs at fraction of pipeline clock (1/2 to 1/8)

◆ Implements MIPS-III Instruction Set Architecture (ISA)

◆ 3.3V core with 3.3V I/O

◆ Software compatible with entire RISController Series of

Embedded Microprocessors

◆ Industrial temperature range support

◆ Active power management

– Powers down inactive units, through sleep-mode feature

◆ 100 pin compatibility between RC64574, RC64474 and

RC4640

◆ 100 pin compatibility between RC64575, RC64475 and

RC4650

◆ RC64474 available in 128-pin QFP package, for 32-bit only

systems

◆ RC64475 available in 208-pin QFP package, for full 64/32 bit

systems

◆ Simplified board-level testing, through full Joint Test Action

Group (JTAG) boundary scan

◆ Windows? CE compliant