国产精品久久久久无码av色戒,大帝av在线一区二区三区,国产肥熟女视频一区二区三区,大陆少妇xxxx做受,被黑人猛躁10次高潮视频

PRODUCT OVERVIEW

Introduction

The Parallax SX family of configurable communications controllers is fabricated in an advanced CMOS process technology. The advanced process, combined with a RISC-like architecture, allows high-speed computation, flexible I/O control, and efficient data manipulation. Throughput is enhanced by operating the device at frequencies up to 75 MHz and by optimizing the instruction set to include mostly single-cycle instructions. The deterministic architecture of the SX provides reliable performance for time-critical applications. In addition, the SX architecture is flash-based and therefore reprogrammable. On-chip functions include a generalpurpose 8-bit timer with prescaler, an analog comparator, a brown-out detector, a watchdog timer, a power-save mode with multi-source wakeup capability, an internal R/C oscillator, user-selectable clock modes, and highcurrent outputs. These features enable the SX to be used as a general-purpose, high-speed microcontroller in a variety of applications.

Key Features

75 MIPS Performance

? SX20AC/SX28AC: DC - 75 MHz

? SX20AC/SX28AC: as low as 13.3 ns instruction cycle, 39.9 ns internal interrupt response

? 1 instruction per clock for most instructions (skips require 2 clocks, branches require 3 clocks, IREAD requires 4) EE/FLASH Program Memory and SRAM Data Memory

? Access time of < 13.3 ns provides single cycle access

? EE/Flash rated for > 10,000 rewrite cycles

? 2048 Words EE/Flash program memory

? 136x8 bits SRAM data memory

CPU Features

? Compact, RISC-like instruction set

? All non-branch instructions are single cycle

? Eight-level push/pop hardware stack for subroutine operation

? Fast table lookup capability through run-time readable code (IREAD instruction)

? Totally predictable program execution rate for precise real-time applications Fast and Deterministic Interrupt

? Jitter-free 3-cycle internal interrupt response

? Hardware context save/restore of key resources such as PC, W, STATUS, and FSR within the 3-cycle interrupt response time

? External wakeup/interrupt capability on Port B (8 pins)

Flexible I/O

? All port pins individually programmable as I/O

? Inputs are TTL or CMOS level selectable

? All pins have selectable internal pull-ups

? Selectable Schmitt Trigger inputs on Ports B and C

? All output pins capable of sourcing/sinking 30 mA

? Port A outputs have symmetrical drive

? Analog comparator support on Port B (RB0 OUT, RB1 IN-, RB2 IN+)

? Selectable I/O operation synchronous to the oscillator clock

Hardware Peripheral Features

? One 8-bit Real Time Clock/Counter (RTCC) with programmable 8-bit prescaler

? Watchdog Timer (shares the RTCC prescaler)

? Analog comparator

? Brown-out detector

? Multi-Input Wakeup logic on 8 pins

? Internal RC oscillator with configurable rate from 31.25 kHz to 4 MHz

? Power-On-Reset

Packages

? 20-pin SSOP, 28-pin DIP/SSOP Programming and Debugging Support

? On-chip in-system serial programming support via the oscillator pins

? On-chip in-system debugging support logic

? Real-time emulation, full program debug, and integrated development environment offered by the

Parallax SX-Key? programming device

? The language options available: Parallax Assembly; Parallax SX/B (BASIC); and CCS SX/C (C)

Software Support

? Native assembly instruction set

? Expanded assembly instruction set available in the SASM assembler of the Parallax SX-Key IDE

? Parallax SX/B compiler (BASIC)

? Several “C” compliers available from third-party vendors