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位置:74LS166 > 74LS166詳情

74LS166中文資料

廠家型號

74LS166

文件大小

106.68Kbytes

頁面數(shù)量

4

功能描述

8-BIT SHIFT REGISTERS

數(shù)據(jù)手冊

下載地址一下載地址二到原廠下載

生產(chǎn)廠商

MOTOROLA

74LS166數(shù)據(jù)手冊規(guī)格書PDF詳情

The SN54L/74LS166 is an 8-Bit Shift Register. Designed with all inputs buffered, the drive requirements are lowered to one 54/74LS standard load. By utilizing input clamping diodes, switching transients are minimized and system design simplified.

The LS166 is a parallel-in or serial-in, serial-out shift register and has a complexity of 77 equivalent gates with gated clock inputs and an overriding clear input. The shift/load input establishes the parallel-in or serial-in mode. When high, this input enables the serial data input and couples the eight flip-flops for serial shifting with each clock pulse. Synchronous loading occurs on the next clock pulse when this is low and the parallel data inputs are enabled. Serial data flow is inhibited during parallel loading.

? Synchronous Load

? Direct Overriding Clear

? Parallel to Serial Conversion

74LS166產(chǎn)品屬性

  • 類型

    描述

  • 型號

    74LS166

  • 制造商

    MOTOROLA

  • 制造商全稱

    Motorola, Inc

  • 功能描述

    8-BIT SHIFT REGISTERS

更新時間:2025-7-3 15:45:00
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