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位置:MH8S64AQFC-7 > MH8S64AQFC-7詳情

MH8S64AQFC-7中文資料

廠家型號(hào)

MH8S64AQFC-7

文件大小

670.5Kbytes

頁面數(shù)量

55

功能描述

536,870,912-BIT (8,388,608 - WORD BY 64-BIT)SynchronousDRAM

數(shù)據(jù)手冊(cè)

下載地址一下載地址二到原廠下載

生產(chǎn)廠商

MITSUBISHI

MH8S64AQFC-7數(shù)據(jù)手冊(cè)規(guī)格書PDF詳情

DESCRIPTION

The MH8S64AQFC is 8388608 - word by 64-bit Synchronous DRAM module. This consists of four industry standard 8Mx16 Synchronous DRAMs in TSOP and one industory standard EEPROM in TSSOP.

The mounting of TSOP on a card edge Dual Inline package provides any application where high densities and large quantities of memory are required.

This is a socket type - memory modules, suitable for easy interchange or addition of modules.

? Utilizes industry standard 8M x 16 Sy nchronous DRAMs

TSOP and industry standard EEPROM in TSSOP

? 144-pin (72-pin dual in-line package)

? single 3.3V±0.3V power supply

? Max. Clock frequency -6:133MHz,-7,8:100MHz

? Fully synchronous operation referenced to clock rising edge

? 4 bank operation controlled by BA0,1(Bank Address)

? /CAS latency- 2/3(programmable)

? Burst length- 1/2/4/8/Full Page(programmable)

? Burst type- sequential / interleave(programmable)

? Column access - random

? Auto precharge / All bank precharge controlled by A10

? Auto refresh and Self refresh

? 4096 refresh cycle /64ms

? LVTTL Interface

APPLICATION

main memory or graphic memory in computer systems

更新時(shí)間:2025-8-23 9:03:00
供應(yīng)商 型號(hào) 品牌 批號(hào) 封裝 庫存 備注 價(jià)格
MITSUBISHI
23+
NA
25060
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