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A6810EEP中文資料

廠家型號(hào)

A6810EEP

文件大小

150.16Kbytes

頁(yè)面數(shù)量

8頁(yè)

功能描述

DABiC-IV, 10-BIT SERIAL-INPUT, LATCHED SOURCE DRIVERS

數(shù)據(jù)手冊(cè)

下載地址一下載地址二到原廠下載

簡(jiǎn)稱(chēng)

ALLEGRO

生產(chǎn)廠商

Allegro MicroSystems

中文名稱(chēng)

官網(wǎng)

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A6810EEP數(shù)據(jù)手冊(cè)規(guī)格書(shū)PDF詳情

The A6809– and A6810– devices combine 10-bit CMOS shift registers, accompanying data latches and control circuitry with bipolar sourcing outputs and pnp active pull downs. Designed primarily to drive vacuum-fluorescent displays, the 60 V and -40 mA output ratings also allow these devices to be used in many other peripheral power driver applications. The A6809– and A6810– feature an increased data input rate (compared with the older UCN/UCQ5810-F) and a controlled output slew rate. The A6809xLW and A6810xLW are identical except for pinout.

The CMOS shift register and latches allow direct interfacing with microprocessor-based systems. With a 3.3 V or 5 V logic supply, typical serial-data input rates are up to 33 MHz.

A CMOS serial data output permits cascade connections in applications requiring additional drive lines. Similar devices are avail-able as the A6811– (12 bits), A6812– (20 bits), and A6818– (32 bits). The A6809– and A6810– output source drivers are npn Darling tons, capable of sourcing up to 40 mA. The controlled output slew rate reduces electromagnetic noise, which is an important consideration in systems that include telecommunications and/or microprocessors and to meet government emissions regulations. For inter-digit blanking, all output drivers can be disabled and all sink drivers turned on with a BLANKING input high. The pnp active pull-downs will sink at least 2.5 mA.

All devices are available in two temperature ranges for optimum performance in commercial (suffix S-) or industrial (suffix E-) applications. The A6810– is provided in three package styles for through-hole DIP (suffix -A), surface-mount SOIC (suffix -LW), or minimum-area surface-mount PLCC (suffix -EP). The A6809– is provided in the SOIC (suffix -LW) only. Copper lead frames, low logic-power dissipation, and low output-saturation voltages allow all devices to source 25 mA from all outputs continuously over the maximum operating temperature range.

FEATURES

■ Controlled Output Slew Rate

■ High-Speed Data Storage

■ 60 V Minimum Output Breakdown

■ High Data Input Rate

■ PNP Active Pull-Downs

■ Low Output-Saturation Voltages

■ Low-Power CMOS Logic and Latches

■ Improved Replacements

for TL4810–, UCN5810–, and UCQ5810–

A6810EEP產(chǎn)品屬性

  • 類(lèi)型

    描述

  • 型號(hào)

    A6810EEP

  • 制造商

    ALLEGRO

  • 制造商全稱(chēng)

    Allegro MicroSystems

  • 功能描述

    DABiC-IV, 10-BIT SERIAL-INPUT, LATCHED SOURCE DRIVERS

更新時(shí)間:2025-7-4 17:22:00
供應(yīng)商 型號(hào) 品牌 批號(hào) 封裝 庫(kù)存 備注 價(jià)格
ALLEGRO
1630+
PLCC20
520
代理品牌
ALLEGRO
23+
原廠原包
19960
只做進(jìn)口原裝 終端工廠免費(fèi)送樣
ALLEGRO
2023+
PLCC20
58000
進(jìn)口原裝,現(xiàn)貨熱賣(mài)
ALLEGRO
24+
SOP
2500
ALLEGRO
10+
SOP-20
7800
全新原裝正品,現(xiàn)貨銷(xiāo)售
ALLEGRO
24+
SOP20
5650
公司原廠原裝現(xiàn)貨假一罰十!特價(jià)出售!強(qiáng)勢(shì)庫(kù)存!
ALLEGRO
SOP-20
491
全新原裝100真實(shí)現(xiàn)貨供應(yīng)
ALLEGRO
22+
原廠原封
8200
原裝現(xiàn)貨庫(kù)存.價(jià)格優(yōu)勢(shì)!!
ALLEGRO
24+
SOP20
2987
只售原裝自家現(xiàn)貨!誠(chéng)信經(jīng)營(yíng)!歡迎來(lái)電!
ALLEGRO
24+
SOP20
6540
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Allegro MicroSystems

中文資料: 11808條

Allegro MicroSystems是一家全球領(lǐng)先的半導(dǎo)體公司,專(zhuān)注于開(kāi)發(fā)和制造傳感器和功率集成電路(ICs)。成立于1990年,總部位于美國(guó)馬薩諸塞州的威爾明頓,Allegro在運(yùn)動(dòng)控制和能源高效系統(tǒng)領(lǐng)域擁有超過(guò)30年的行業(yè)經(jīng)驗(yàn)。 Allegro以其創(chuàng)新的技術(shù)和高性能的產(chǎn)品而聞名,尤其在汽車(chē)、工業(yè)和消費(fèi)電子等市場(chǎng)中。公司開(kāi)發(fā)的產(chǎn)品廣泛應(yīng)用于電動(dòng)交通、自動(dòng)駕駛、先進(jìn)駕駛輔助系統(tǒng)(ADAS)以及智能電網(wǎng)等領(lǐng)域。每年,Allegro向全球超過(guò)10,000家客戶(hù)出貨超過(guò)10億個(gè)單位,其中包括超過(guò)50家汽車(chē)原始設(shè)備制造商(OEM)。 公司在全球范圍內(nèi)提供工程、制造和技術(shù)支持,憑借其靈活的運(yùn)營(yíng)模式和